PayloadPlus Product Briefs
The following product briefs are currently available from Agere Systems without a non-disclosure agreement. If you are interested in learning more about Agere Systems Network Processor solutions, please complete the Information Request for information on becoming a registered partner.
- Agere Systems NPFPP
Fast Pattern Processor
Adobe Acrobat (164 KB)
Abstract: This product brief offers an overview of the Agere Systems Fast Pattern Processor
(FPP), which performs protocol classification at 2.5 Gbps wire rates.
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- Agere Systems NPRSP Routing Switch Processor
- Adobe Acrobat (162 KB)
Abstract: This product brief offers an overview of the Agere Systems Routing Switch Processor (RSP) which performs traffic management, queuing, traffic shaping and modifications at 2.5 Gpbs wire rates.
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- Agere Systems NPASI
Agere System Interface
- Adobe Acrobat (148 KB)
Abstract: This product brief offers an overview of the Agere System Interface (ASI) that provides an interface between control and data planes, and that performs policing and state maintenance.
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- Agere Systems NPVPP
Voice Packet Processor
- Adobe
Acrobat (127 KB)
Abstract: This
product brief offers an overview of the Agere Systems Voice Packet Processor
(VPP) which parses and assembles ATM Adaption Layer 2 (AAL2) traffic.
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- Agere
Systems Functional Programming Language (FPL)
- Adobe
Acrobat (143 KB)
Abstract: This
product brief offers an overview of the Agere Systems Functional Programming
Language (FPL). It describes architecture, terms and concepts,
processing functions, programming, processing, data flow, programming,
dynamic program changes and program execution structure. (Return
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- Integrated
Development System (IDS) for Hardware and Software Development
- Adobe
Acrobat (789 KB)
Abstract: This
product brief offers an overview of the Agere Systems Integrated Development
System for developing hardware and software solutions using the Agere
Systems FPP, RSP, and ASI Network Processors and Network Processor languages.
It describes the hardware system, the software development environment,
the application code library, device drivers, technical support and
ordering options. (Return to top)
- Software
Development Environment (SDE)
- Adobe
Acrobat (809 KB)
Abstract: This
product brief offers an overview of the Agere Systems Software Development
Environment (SDE) for developing software solutions using the Agere
Systems FPP, RSP, and ASI Network Processors and Functional Programming
Language. It describes the SDE components, documentation and application
development flow. (Return to top)
- Software
Programming Environment (SPE)
Adobe Acrobat
( 141 KB)
This product brief explains the features and benefits of the Software
Programming Environment (SPE) that includes the Agere Functional Programming
Language (FPL), Agere Script Language (ASL), the Traffic Generator
Utility, Application Programming Interface, and System Performance
Analyzer.
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White
Papers
The following white papers
are currently available from Agere Systems without a non-disclosure
agreement. If you are interested in learning more about Agere Systems
solutions, please complete the Information
Request for information on becoming a registered partner.
- White
Paper: The Challenge for Next Generation Network Processors
- Adobe
Acrobat (235 KB)
Abstract: This
paper provides an overview of how network processor technology has evolved
and why current processor technology is insufficient to meet future
demands. AgereËs Wicked Smart approach will be shown to offer vendors
new hope for delivering a new class of product that combines the performance
benefits of ASICs with the ease of configuration of software-based devices.
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- White
Paper: The Case for a Classification Language
- Adobe
Acrobat (616 KB)
Abstract: This
paper details the need for a high-level ŸClassification Language÷ in
communications. It describes classification and its role within communications,
discusses necessary attributes of classification languages, and compares
these to traditional implementations in languages such as ŸC.÷
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- White
Paper: Building Next Generation Network Processors
- Adobe
Acrobat (446 KB)
Abstract: It
is clear that the next generation of network processors employing a
new programmable architecture is needed to scale to a gigabit and beyond. This paper describes the limitations of RISC-based architectures operating in this environment, and describes the requirements of a new architecture that can deal with these limitations. It describes the techniques that a new architecture may employ, such as pipelining, parallelism, and separate program and I/O data paths.
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